APK Oasis

AMD Ryzen 7 9800X3D Uses A Thick Dummy Silicon That Comprises 93% Of The CCD Stack And Has No Performance Purpose

By Sarfraz Khan
From Wccftech

AMD Ryzen 7 9800X3D Uses A Thick Dummy Silicon That Comprises 93% Of The CCD Stack And Has No Performance Purpose

The CCD stack with 3D V-Cache on the AMD Ryzen 7 9800X3D is only 40-45µm in total, but the rest of the layers add up to a whopping 750µm, which is entirely non-functional but is crucial for stability.

AMD Ryzen 7 9800X3D's incredible gaming performance doesn't need an introduction. After introducing the 3D V-Cache technology with the Ryzen 7 5800X3D, AMD, for the first time, changed how the 3D stack would sit on the substrate. On previous X3D chips, the 3D chiplet was stacked on top of the Core Complex Die, allowing the cores to have direct access to all that extra L3 cache memory, but the 9800X3D brought the 3D chiplet underneath the CCD.

This small yet significant change resulted in lower temperatures and unlocked the AMD Ryzen 7 9800X3D's overclocking potential, allowing it to reach 4.7 GHz even at the base clock. However, the CCD design is a bit unusual compared to the previous X3D chips. The semiconductor analyst Tom Wassick analyzed the CCD on the 9800X3D and found that most of the silicon on it is rather useless.

This doesn't mean that it has no purpose, but it isn't involved a bit in the operation. The CCD and SRAM silicon layers just measure 7.2µm and 6µm respectively and the total die stack with interconnects and stuff measures just 40-45µm. However, the total CCD is around 800µm in thickness, which leaves 750µm of silicon layers. This thick layer doesn't contain any functional part but rather sticks to the stack to improve the structural support and provide more protection.

Since the SRAM and CCD layers are pretty thin, they are pretty fragile and could result in damage during manufacturing or handling. With the added dummy silicon, the issue is eliminated. Apart from the dummy silicon, the SRAM silicon also extends on the sides by 50µm for a similar purpose.

All in all, this is something that was needed to ensure the reliability and stable operation of the complete 3D die stack. AMD solved a lot of problems with this design apart from putting the SRAM underneath the CCD to ensure the cores can be cooled directly.

Previous articleNext article

POPULAR CATEGORY

Software

35304

Artificial_Intelligence

12291

Internet

26604