The M5 chips will be manufactured using TSMC's N3P process node, which is an improvement over the N3E process used for the M4 chips. This new process is expected to offer 5% performance increase or 5-10% power reduction compared to the N3E process.

The production schedule for the M5 series is expected to be:

For the M5 Pro, M5 Max, and M5 Ultra chips, Apple is reportedly adopting a server-grade System-on-Integrated-Chips (SoIC) design. Specifically, a 2.5D packaging technology called SoIC-mH (molding horizontal).

This design is expected to use 30-50% less space than conventional system-on-chip designs.

In a departure from previous designs, Apple is expected to separate the CPU and GPU in the M5 Pro, Max, and Ultra chips to improve production yields and thermal performance.

It is also Expected to offer improvements for AI tasks, particularly inferencing.

It also May play a crucial role in Apple's Private Cloud Compute (PCC) infrastructure.